USRP-LW X310 | USRP X310 SDR Software Defined Radio 45w 16 Bits 200 MHz, Support for Arbitrary Sampling Rates

The USRP-LW X310 is a high-performance, scalable software-defined radio (SDR) platform for designing and deploying next-generation wireless communication systems.

The USRP-LW X310 hardware architecture combines two expanded bandwidth daughter board slots with a bandwidth of up to 160M from DC to 6GHz. It features multiple high-speed interfaces to choose from (PCIe, Gigabit/10 Gigabit Ethernet ports), as well as a resource-rich, user-programmable Kintex-7 FPGA. The USRP-LW X310 uses an open source cross-platform UHD driver, with a large number of development frameworks, compatible reference architectures, and open source projects.

As the digital processing core of the USRP-LW X310, the XC7K410T FPGA provides high-speed connectivity between all major components, including RF front end, host interface, and DDR3 memory. The default FPGA provides all UHDs for controlling digital downconversion and digital upconversion, fine frequency tuning, and other DSP function blocks. Users can take advantage of the spare space of the resource-rich Kintex-7 FPGA, plus the RFNoC development framework supported by USRP, to develop and implement their own DSP processing modules.

The USRP-LW X310 Equipment Kit includes:

• One USRP-LW X310 main unit
• Gigabit cable
• SFP+ Gigabit adapter
• Power adapter
• USB2.0 JTAG cable
• 4 SMA connector RF cables

The USRP-LW X310 offers a variety of high-speed interfaces to choose from. On the panel of the device, the Gigabit Ethernet port is one of the simplest and most commonly used ways to connect. For applications with extended bandwidth and low latency, such as PHY/MAC studies, the X310 provides an efficient bus interface PCIe x4 for deterministic operation. When the application uses network recording or multi-node processing, the 10 Gigabit port is the best choice.

The USRP-LW X310 includes many additional features that support various wireless applications. In FPGA design, the 1GB DDR3 on the motherboard can be used for data buffering and storage. The optional internal GPSDO provides high-precision frequency reference when synchronized to the GPS system with a synchronization delay of less than 50ns. The GPIO interface allows users to control external components such as amplifiers and switches, support inputs such as event triggers, and observe debug signals. The USRP-LW X310 also includes an internal JTAG adapter that enables developers to easily load and debug new FPGA images.